• K.Satish
• N. Balaji

Hazy weather conditions cause significant degradation in image clarity due to light scattering, resulting in reduced contrast and color distortion. To overcome this challenge, a hardware-efficient image dehazing system has been developed using an optimized VLSI architecture that integrates the Dark Channel Prior (DCP) with a saturation-based transmission estimation technique. The proposed approach employs a 5×5 minimum filter on a downsampled image to achieve accurate atmospheric light estimation while minimizing computational complexity. A saturation-driven pixel-level transmission model is incorporated to suppress halo effects and preserve fine image details. The algorithm is first validated in MATLAB and then implemented in Verilog HDL on a Zynq 7000 FPGA platform. Experimental analysis demonstrates that the proposed design achieves higher PSNR and SSIM values with reduced logic utilization and low power consumption compared to existing architectures. This work effectively balances restoration accuracy and hardware resource efficiency, making it suitable for real-time embedded vision applications such as surveillance, autonomous systems, and outdoor imaging under adverse weather conditions.

Image Dehazing, FPGA, Dark Channel Prior, Saturation Mapping, VLSI Architecture, Real-Time Processing.

"VLSI Implementation Of Image Dehazing Algorithms", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.12, Issue 11, page no.c612-c618, November-2025, Available :http://www.jetir.org/papers/JETIR2511275.pdf

"VLSI Implementation Of Image Dehazing Algorithms", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.12, Issue 11, page no. ppc612-c618, November-2025, Available at : http://www.jetir.org/papers/JETIR2511275.pdf