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Published in:

Volume 6 Issue 4
April-2019
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIRBC06047


Registration ID:
207138

Page Number

297-309

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Title

Design and Simulation of 8 Bit x 8 Bit Approximate Dadda Multiplier

Abstract

Error Tolerance formally captures applications such as audio, video, graphics and wireless communications. Erroneous values are produces as outputs by a defective chip [called as approximate value].To reduce this errors mostly filters come into existence. Filters are a part of the analog and digital technologies which is used to suppress or attenuate the data or the range of frequencies of a signal. Predominantly multiplier plays a vital role in the digital applications. In digital signal processing, multipliers are key arithmetic circuits. In this paper, instead of traditional multipliers, an approximate multiplier are used because it consists of low power consumption and short critical path. It is also used in DSP applications due to high performance. There are certain limitations for the design of multipliers mainly area, delay, power consumption, power dissipation. Even though there are changes in the area can be accepted. Approximate multiplier has most of the errors in their magnitude. The simulation of the designs is performed in Xilinx ISE 14.5 Tool and their functionality is verified by using ISIM Simulator.

Key Words

Approximate computing, Error Tolerant, Dadda Multiplier

Cite This Article

"Design and Simulation of 8 Bit x 8 Bit Approximate Dadda Multiplier", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 4, page no.297-309, April-2019, Available :http://www.jetir.org/papers/JETIRBC06047.pdf

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2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Design and Simulation of 8 Bit x 8 Bit Approximate Dadda Multiplier", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 4, page no. pp297-309, April-2019, Available at : http://www.jetir.org/papers/JETIRBC06047.pdf

Publication Details

Published Paper ID: JETIRBC06047
Registration ID: 207138
Published In: Volume 6 | Issue 4 | Year April-2019
DOI (Digital Object Identifier):
Page No: 297-309
Country: --, -, - .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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