UGC Approved Journal no 63975

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 5 Issue 7
July-2018
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIRC006340


Registration ID:
184664

Page Number

179-184

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Title

SYSTEM VERILOG MODEL DEVELOPMENT & VERIFICATION OF POR(POWER ON RESET) IN SENSOR CHIP

Abstract

Simulation time, cost and test approaches are the major problems in the mixed-signal verification of a complex System-on-Chip (SoC). In this paper, an equivalent Power On Reset (POR) model has been created using the System Verilog language placed into a mixed-signal Sensor chip. Such a model can be simulate on a digital simulator, which is considerably faster as well as economical than the traditional method using an analog solver. Some verification approaches based on digital methods (Universal verification methodology) are also presented.

Key Words

POR, Mixed-Signal Verification, System Verilog, UVM

Cite This Article

"SYSTEM VERILOG MODEL DEVELOPMENT & VERIFICATION OF POR(POWER ON RESET) IN SENSOR CHIP ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 7, page no.179-184, July-2018, Available :http://www.jetir.org/papers/JETIRC006340.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"SYSTEM VERILOG MODEL DEVELOPMENT & VERIFICATION OF POR(POWER ON RESET) IN SENSOR CHIP ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 7, page no. pp179-184, July-2018, Available at : http://www.jetir.org/papers/JETIRC006340.pdf

Publication Details

Published Paper ID: JETIRC006340
Registration ID: 184664
Published In: Volume 5 | Issue 7 | Year July-2018
DOI (Digital Object Identifier):
Page No: 179-184
Country: -, -, - .
Area: Engineering
ISSN Number: 2349-5162


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