• Pratibhadevi Tapashetti
• Dr. Praveen Kumar

In our study, we propose the best solution to this problem by introducing a new efficient VLSI architecture of parallel Multiplier-and Accumulator (MAC) using hybrid approach for high-speed arithmetic operations. Since the accumulator that has the largest delay in MAC, the Carry Save Adder (CSA) and compressor techniques are used as one of the processing element to improve the overall performance. Since, the accumulator that has the largest delay in MAC was merged into CSA, hence the overall performance is elevated. The Proposed MAC accumulates the intermediate results in the type of sum and carry bits instead of the output of the final adder, which made it possible to optimize the pipeline scheme to improve the performance. like radix This study presents an efficient implementation of high speed multiplier, Radix-8 modified Booth multiplier algorithm. The parallel 2 and radix 4 modified booth multiplier does the computations using lesser adders and lesser iterative steps. However, the fact remains that the area and speed are two conflicting performance constraints. Hence, innovating increased speed always results in larger area. In this, we arrive at a better trade-off between the two, by realizing a marginally increased multipliers speed performance the proposed MAC will show the better properties to the existing standard design in many ways and performance twice as much as the previous research in the similar clock frequency.

Booth Multiplier, Carry Save Adder–CSA, Computer Arithmetic, Digital Signal Processing-DSP, Multiplier & Accumulator-MAC, Booth Algorithm etc.

"Compatible VLSI Architecture of Multiplier and Accumulator Based on Modified Booth Algorithm", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 1, page no.27-32, January-2018, Available :http://www.jetir.org/papers/JETIR1801322.pdf

"Compatible VLSI Architecture of Multiplier and Accumulator Based on Modified Booth Algorithm", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 1, page no. pp27-32, January-2018, Available at : http://www.jetir.org/papers/JETIR1801322.pdf