• M SATYANARAYANA
• Dr D NAGESWAR RAO
• E PRABHAKAR
• CH SOUMYA

Abstract: The high speed computation and complex computing application requirements are growing phenomenally in current compute intensive world. Due to growing demands power consumption, chip size issues and heat dissipation are the most challenging for logic design with existing technologies. So the designs of low power and high speed logic circuits are creating tremendous interest in current scenario. Reversible computing is developing as an elective that offers high calculation speed, high bundling thickness, low heat dissipation and low power utilization and so on.Utilizing the reversible logic gates using MOSFETs, a 4-bit carry skip adder has been intended for 1.8V task utilizing TSG gate and fredkin gate. The carry skip adder performs four arithmetic and four logical tasks. MOSFET transistors have been promising in acknowledging expanded usefulness on a chip. The sources of input signals, computes the weighted whole of all information signals and after that controls the ON and OFF conditions of the transistor.The results are observed from the Cadence Virtuso ADE.

MOSFET, TSG, Reversible gates, Adders.

"Implementation of 4-Bit Carry Skip Adder Using Reversible Logic with Transistor 180-nm Technology", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 7, page no.147-150, July-2018, Available :http://www.jetir.org/papers/JETIR1807175.pdf

"Implementation of 4-Bit Carry Skip Adder Using Reversible Logic with Transistor 180-nm Technology", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 7, page no. pp147-150, July-2018, Available at : http://www.jetir.org/papers/JETIR1807175.pdf