• Tanisha Tomar
• Mr. Rajesh Parihar

Adders are used in processors in the arithmetic logic units, to calculate addresses, table indices, and other similar operations. A new area efficient carry look ahead adder including full adder, propagate generate adder, logic AND gates, logic OR gates and XOR gates has been implemented to enhance the performance of arithmetic systems. In this paper, proposed 4 bit carry look ahead adder is implemented in 90 nm,130 nm and 180 nm technology at 0.9 V, 1.2 V and 1.8 V respectively using GDI (Gate Diffusion Input) technique which shows better results in comparison to previous carry look ahead adders. Power consumption and number of transistors are compared and analyzed.

Very large scale integration, Carry Look Ahead Adders, Area

"AREA EFFICIENT CARRY LOOK AHEAD ADDER IN GDI TECHNOLOGY", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 7, page no.884-893, July-2018, Available :http://www.jetir.org/papers/JETIR1807589.pdf

"AREA EFFICIENT CARRY LOOK AHEAD ADDER IN GDI TECHNOLOGY", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 7, page no. pp884-893, July-2018, Available at : http://www.jetir.org/papers/JETIR1807589.pdf