• Neha Tiwari
• Dr. SRP Sinha

A high Bandwidth Operational amplifier is required for many applications. So we need a study of operational Amplifier Bandwidth extension in such a way that other parameters are not affected. The two stage CMOS Op-Amp is exhibited in the paper that works at 1.8V supply voltage at 180nm technology and its input is relied on Bias current. Total power consumption of the circuit has been reduced by scaling down the supply voltage. The object of my research work is to decrease power dissipation, high gain and high swing. There is a back-and-forth amongst speed, power and gain at high supply voltages. Speed, power and gain determines the performance of any system. The op-amp has small stand-in power utilization, having large driving ability and works at small voltage in order that the circuit works at small power. This op-amp gives a gain of 70 dB, UGB of 53.01 MHz and phase margin of 27.83°. It has power consumption and CMRR of the operational amplifier are got as 523µW, and 73.33 dB respectively.

Phase margin, CMOS Opamp, Low Power

"Design of High Gain and Large Voltage Swing Two Stage Miller Compensated CMOS Operational Amplifier", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 11, page no.724-732, November-2018, Available :http://www.jetir.org/papers/JETIR1811192.pdf

"Design of High Gain and Large Voltage Swing Two Stage Miller Compensated CMOS Operational Amplifier", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 11, page no. pp724-732, November-2018, Available at : http://www.jetir.org/papers/JETIR1811192.pdf