• S.Satya Narayana
• D.Ajay Kumar
• Dr.Sreenivasarao Ijjada

The distinctive traits of 6T-sram memory cell based on 7 nm FINFET are studied. Power leakage in a ram cellular is a major situation in these days’ improvement of shrinking length and excessive standby memories. To clear up the strength leakage hassle, many researchers have proposed exceptional thoughts from the tool stage to the architectural level and above. SRAM designs have grown to be the difficulty of sizeable studies to increase require for electronic circuit applications. The outcomes of H-spice simulations show approximately 50% decrease the energy utilization of the Read/ write margin of this architecture.

7nm FinFET, H-spice,6T-SRAM

"Low Energy utilization of 14nm FINFET technology 6T-SRAM style ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.5, Issue 12, page no.113-117, December-2018, Available :http://www.jetir.org/papers/JETIR1812215.pdf

"Low Energy utilization of 14nm FINFET technology 6T-SRAM style ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.5, Issue 12, page no. pp113-117, December-2018, Available at : http://www.jetir.org/papers/JETIR1812215.pdf