• Kritika Purohit
• Dr.Vibhakar Pathak

There are various ways to improve the throughput of a system. One of the key factors is processor. Series of so many analyses have been carried out and developments have been made for the same viz. pipelining, parallel processing, multi-core etc. There are various parameters viz. superscalar factor, reservation station architecture, number of different functional units, reservation station size, memory architecture etc. which influence the performance of the superscalar processor. The average Instruction fetch efficiency factor of superscalar architecture controls the performance aspect. The purpose of this work is to obtain the optimal configuration of the memory for superscalar architecture by conducting a qualitative and quantitative study.

superscalar factor, reservation station architecture, number of different functional units, reservation station size, memory architecture component

"Performance Measurement For Various Memory Architecture Of Superscalar Pipelined Processor ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 2, page no.640-649, February-2019, Available :http://www.jetir.org/papers/JETIR1902A92.pdf

"Performance Measurement For Various Memory Architecture Of Superscalar Pipelined Processor ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 2, page no. pp640-649, February-2019, Available at : http://www.jetir.org/papers/JETIR1902A92.pdf