• P.H.Chandra Mouli
• J.V.Pesha

There has been recent interest on designing Double Error Correction (DEC) codes for 32-bit data words that support fast decoding as they can be useful to protect memories. To that end, solutions based on Orthogonal Latin Square codes have been recently presented that achieve fast decoding but require a large number of parity check bits. In this letter, a DEC code derived from Difference Set codes is presented. The proposed code is able to reduce the number of parity check bits needed at the cost of a slightly more complex decoding. Therefore, it provides memory designers with an additional option that can be useful when making trade-offs between memory size and speed

Error correction codes, memories, Difference Set codes, Orthogonal Latin Square codes

"4-BIT BURST ERROR CORRECTION WITH EFFICIENT DECODING BY USING DOUBLE ERROR CORRECTION CODE", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 6, page no.739-744, June-2019, Available :http://www.jetir.org/papers/JETIR1906G14.pdf

"4-BIT BURST ERROR CORRECTION WITH EFFICIENT DECODING BY USING DOUBLE ERROR CORRECTION CODE", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 6, page no. pp739-744, June-2019, Available at : http://www.jetir.org/papers/JETIR1906G14.pdf