• Nikhil Goyal
• Ashish Sachdeva

Floor planning is a prominent area in the (VLSI) circuit design automation, because it affects the performance, size, yield and reliability of the VLSI chips. Shrinking of manufacturing process, the power density of chips has increased under such a large power density the temperature problem will be highlighted. As technology progresses and the number of IP core in chips increases, power density in SoCs caused local temperature rose rapidly, which affects the stability of chips? Especially, how to avoid the local hotspots problem has become a major challenge in the design stage. Due to this problem thermal-aware floor planning attracts the researchers’ attention. PSO based approach for VLSI floor planning exhibits rapid convergence, leads to more optimal solutions and gives reasonable solutions only on the hard IP modules placement problem. Modeling wire delay without considering temperature variations(gradient) in different areas of the die crossed by global wires can lead to too pessimistic, or in general in accurate, estimates. A PSO-GA based hybrid algorithm is used to reduce the area, wire length, and hotspot by distributing the temperature evenly across the chip. Using geometric programming (GP) method it is possible to find a floor plan that can reduce the maximum temperature of the chip and lower the chip area while maintaining comparable performance.

Very Large-Scale Integrated, Thermal Aware Floor Planning, Genetic Algorithm, Particle Swarm Optimization, Harmony Search Algorithm

"Performance Analysis of Thermal Aware Floor Planning Techniques", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 6, page no.930-935, June-2019, Available :http://www.jetir.org/papers/JETIR1908740.pdf

"Performance Analysis of Thermal Aware Floor Planning Techniques", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 6, page no. pp930-935, June-2019, Available at : http://www.jetir.org/papers/JETIR1908740.pdf