UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Published in:

Volume 7 Issue 6
June-2020
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2006519


Registration ID:
234726

Page Number

1280-1286

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Title

Design and Simulation of Asymmetrical Multilevel Inverter with Reduced Switches

Abstract

In recent days, electronic devices are very sensitive to harmonics. The harmonic free and high power rating sources are increased to meet the requirement of industries. As conventional two level inverters are not able to provide good quality power, multilevel inverters are becoming more popular due to their ability to generate more output voltage with fewer harmonic. A new multilevel inverter topology with different magnitude of dc voltage sources has been introduced that requires lesser number of circuit components as compared to other topologies for same levels in output voltage. In this topology, minimum switches are required for generation of higher level output voltage. The method is easy to implement and simple. The extended version of this topology generates more number of output voltage levels. Both the operational accuracy and Total Harmonic Distortion (THD) of the output voltage have been evaluated using simulation in MATLAB environment. Asymmetrical multilevel inverters are mostly suited for high power and medium applications. A comparison is done on the basis of THD to check the performance accuracy of different voltage levels of Asymmetrical cascaded H-bridge multilevel inverter. The inverters are simulated and its results are verified through MATLAB/Simulink software.

Key Words

Asymmetrical, Multilevel inverter, Harmonics, Total Harmonic Distortion

Cite This Article

"Design and Simulation of Asymmetrical Multilevel Inverter with Reduced Switches", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.7, Issue 6, page no.1280-1286, June 2020, Available :http://www.jetir.org/papers/JETIR2006519.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Design and Simulation of Asymmetrical Multilevel Inverter with Reduced Switches", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.7, Issue 6, page no. pp1280-1286, June 2020, Available at : http://www.jetir.org/papers/JETIR2006519.pdf

Publication Details

Published Paper ID: JETIR2006519
Registration ID: 234726
Published In: Volume 7 | Issue 6 | Year June-2020
DOI (Digital Object Identifier):
Page No: 1280-1286
Country: Puducherry, Puducherry, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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