• Arpit Kushwah
• Prof. Santosh Onker

Image and video signals are corrupted by impulse noise during acquisition or transmission. This paper presents a VLSI architecture for efficient wavelet filter implementation tailored to image denoising applications. The proposed architecture achieves a balance between low chip area and high processing speed, addressing the inherent trade-offs in VLSI design. Leveraging the wavelet transform's multi-scale analysis, the architecture employs innovative techniques to enhance denoising performance while maintaining real-time processing capabilities. Simulation is performed using MATLAB and VLSI –Xilinx 14.7 software. The image process to be visualizes using the MATLAB software and the filter architecture to be optimized using the Xilinx.

Wavelet, MATLAB, Image, Denoising, VLSI, Filter, Noise, FPGA

"A Low Area and High Speed VLSI Architecture of the Wavelet Filter for Image Denoising", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.10, Issue 8, page no.d593-d597, August-2023, Available :http://www.jetir.org/papers/JETIR2308376.pdf

"A Low Area and High Speed VLSI Architecture of the Wavelet Filter for Image Denoising", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.10, Issue 8, page no. ppd593-d597, August-2023, Available at : http://www.jetir.org/papers/JETIR2308376.pdf