UGC Approved Journal no 63975(19)
New UGC Peer-Reviewed Rules

ISSN: 2349-5162 | ESTD Year : 2014
Volume 12 | Issue 10 | October 2025

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Published in:

Volume 12 Issue 3
March-2025
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2503379


Registration ID:
555544

Page Number

d723-d727

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Title

HARDWARE IMPLEMENTATION OF DELAY EFFICIENT CDMA ARCHITECTURE FOR NOC APPLICATIONS

Authors

Abstract

The network on chip is an emerging approach for the implementation of the on chip communication architecture. It has emerged as underlying infrastructure for communication between intellectual property cores. It is the solution for communication architecture of future system. In order to improve the design complexity and area efficiency the structure of CDMA –NoC with the standard basis code is implemented. In the gate level MUX is used in the transmitter and receiver module. In the transmitter module data from different senders are encoded with an orthogonal code of a standard basis code and these coded data are mixed by the MUX operation. Then these data’s are transmitted through NoC. In the receiver module these coded data’s can be retrieved by the MUX operation between the data and the orthogonal code. After a simple accumulation the original data can be reconstructed.

Key Words

CDMA, MUX, NoC, Encoding/Decoding, Standard basis cod

Cite This Article

"HARDWARE IMPLEMENTATION OF DELAY EFFICIENT CDMA ARCHITECTURE FOR NOC APPLICATIONS", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.12, Issue 3, page no.d723-d727, March-2025, Available :http://www.jetir.org/papers/JETIR2503379.pdf

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2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"HARDWARE IMPLEMENTATION OF DELAY EFFICIENT CDMA ARCHITECTURE FOR NOC APPLICATIONS", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.12, Issue 3, page no. ppd723-d727, March-2025, Available at : http://www.jetir.org/papers/JETIR2503379.pdf

Publication Details

Published Paper ID: JETIR2503379
Registration ID: 555544
Published In: Volume 12 | Issue 3 | Year March-2025
DOI (Digital Object Identifier):
Page No: d723-d727
Country: coimbatore, TAMILNADU, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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