• Gorla Harika
• Ananda Kumari Nidigatti

The increasing demand for portable and energy-efficient electronic systems has intensified the need for low-power and high-performance on-chip memory architectures. Static Random Access Memory (SRAM) remains a vital component in modern System-on-Chip (SoC) designs; however, conventional 6T SRAM cells encounter significant challenges related to read/write stability, leakage power, and noise margin degradation at advanced technology nodes. This paper presents the design and analysis of a novel eleven-transistor (11T) SRAM cell optimized for low-power operation using Tanner EDA tools. The proposed 11T cell introduces additional transistors to decouple the read and write paths, thereby enhancing stability and minimizing both static and dynamic power consumption with minimal area overhead. Circuit-level simulations were carried out in Tanner S-Edit and T-Spice at the 45 nm CMOS technology node. The proposed design was evaluated against conventional 6T, 8T, and 10T SRAM cells in terms of read/write delay, static noise margin (SNM), leakage power, dynamic power, and area. Post-layout simulations incorporating parasitic extraction were performed to validate real-world performance. The results demonstrate that the 11T SRAM cell achieves superior read stability, improved write margins, and significant power reduction compared to existing designs, making it highly suitable for ultra-low-power and energy-constrained applications. Future work will focus on fabrication and scalability assessment at sub-45 nm nodes.

SRAM, 11T SRAM cell, low-power design, Tanner EDA, static noise margin (SNM), leakage power, dynamic power, CMOS, SoC, memory stability.

"DESIGN AND ANALYSIS OF AN 11T SRAM CELL FOR LOW POWER APLLICATIONS USING TANNER EDA", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.12, Issue 10, page no.c109-c123, October-2025, Available :http://www.jetir.org/papers/JETIR2510217.pdf

"DESIGN AND ANALYSIS OF AN 11T SRAM CELL FOR LOW POWER APLLICATIONS USING TANNER EDA", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.12, Issue 10, page no. ppc109-c123, October-2025, Available at : http://www.jetir.org/papers/JETIR2510217.pdf