• L. Durgadevi
• Dr. Azha Periasamy

ABSTRACT Power optimization is a vital aspect of VLSI circuit design as it determines power consumption and directly influences device performance and battery life. Traditional methods such as clock gating, power gating and voltage scaling have been used to minimize power dissipation; however, they often lack accuracy and speed. In recent years, Machine Learning Techniques have emerged as a promising alternative to achieve efficient power optimization in VLSI circuits. This paper presents a detailed study of existing conventional and Machine Learning based approaches for power optimization, their methodologies, and comparative advantages.

VLSI, power optimization, Machine learning techniques

"POWER OPTIMIZATION IN VLSI CIRCUITS USING MACHINE LEARNING TECHNIQUES", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.12, Issue 11, page no.d114-d116, November-2025, Available :http://www.jetir.org/papers/JETIR2511315.pdf

"POWER OPTIMIZATION IN VLSI CIRCUITS USING MACHINE LEARNING TECHNIQUES", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.12, Issue 11, page no. ppd114-d116, November-2025, Available at : http://www.jetir.org/papers/JETIR2511315.pdf