• Isukapatla Keerthi Priya
• Rama Devi Kolisetty

This paper presents the design and transient-level verification of a 16-bit Successive Approximation Register(SAR) Analog-to-Digital(ADC) using 90-nanometer CMOS technology in the Cadence Virtuoso design environment. The proposed ADC integrates a precharged bootstrapped sampling switch and a two-stage dynamic latch comparator, whose architectures are adapted from an existing 8-bit SAR ADC design, together with a newly designed 16-bit binary weighted bridge-capacitor Digital-to-Analog Converter (CDAC) that extends the reference 8-bit CDAC concept to higher resolution while limiting the total array capacitance and area. A custom successive-approximation control-logic block sequentially resolves the 16 bit output code from the most significant bit (D15) to the least significant bit (D0). Operating from a 1.2-V supply, the bootstrapped switch and the dynamic comparator individually consume power of 295.4 nW and 265.8 nW, respectively, while the complete 16-bit SAR ADC dissipates 460.9 µW power. Transient simulation results confirm correct bootstrapped gate-voltage tracking, proper regenerative comparator switching, and monotonic bit-cycling of the SAR logic across the full 16-bit conversion cycle, validating the functional correctness of the proposed architecture for low-power, high-resolution data-acquisition applications.

SAR ADC, Bootstrapped Switch, Bridge Capacitor CDAC, Dynamic Latch Comparator, Successive Approximation Logic, 90 nm CMOS, Low Power.

"Design Methodology and Performance Simulation of a 16-Bit SAR Analog-to-Digital Converter in 90-nm CMOS", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.13, Issue 9, page no.c314-c321, September-2026, Available :http://www.jetir.org/papers/JETIR2609234.pdf

"Design Methodology and Performance Simulation of a 16-Bit SAR Analog-to-Digital Converter in 90-nm CMOS", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.13, Issue 9, page no. ppc314-c321, September-2026, Available at : http://www.jetir.org/papers/JETIR2609234.pdf