• S.S.R. Mounica
• V. Malleswara Rao
• P. Raju

Recent advancement in CMOS technology involve materials progress which led to new design structures and new design techniques in nanoscale circuits. The 90nm design rules uses CMOS circuits and materials for metal interconnects, allow the design of basic circuits with low power consumption, low delay and less transistor numbers. In this paper, mixed-logic implementation of 2-4 line decoders, combining pass transistors, static CMOS and transmission gates. Comparative spice simulations show that the circuits present a significant improvement in power and delay, outperforming CMOS in almost all cases. Unsupervised learning is used for decoding which can be further used in many applications.

Line decoder, mixed-logic, pass transistor logic, transmission gate logics, unsupervised learning.

"Design and Implementation of 2-4 Mixed-Logic Line Decoders for unsupervised learning", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 2, page no.697-700, February-2019, Available :http://www.jetir.org/papers/JETIRAB06132.pdf

"Design and Implementation of 2-4 Mixed-Logic Line Decoders for unsupervised learning", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 2, page no. pp697-700, February-2019, Available at : http://www.jetir.org/papers/JETIRAB06132.pdf