• Sanjeeda Syed
• P. Suseela
• K. Ushodaya
• G. Vishwanath
• G. Sireesha.

This paper proposes 8-bit ALU with low power designed using 45nm technology. The proposed ALU consists of decoder, data selectors, full adder and some other logic gates such as AND, OR, NAND and XOR, which are used to perform the logical operations. It consists of two sub modules, they are arithmetic unit and logical unit. The arithmetic unit consists of one 4×1 mux and a full adder. The full adder takes the input from 4×1 mux and produces two outputs carry and sum. The logical block consists of one 2×1 decoder whose output is connected the four logical gates out of which one operation will be selected by the 4×1 mux which is the logical output. these ALU has been broadly used in central processing units, micro processors and micro controllers etc. The proposed ALU consumes very less power that is in the order of Pico watts.

45nm Technology Based 8-bit ALU Design using Multiplexers and Decoder

"45nm Technology Based 8-bit ALU Design using Multiplexers and Decoder", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 3, page no.126-132, March-2019, Available :http://www.jetir.org/papers/JETIRAK06024.pdf

"45nm Technology Based 8-bit ALU Design using Multiplexers and Decoder", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 3, page no. pp126-132, March-2019, Available at : http://www.jetir.org/papers/JETIRAK06024.pdf