• Sheeba Ranjini P
• Madan D
• Narendra Prasad M

In this paper, we present the low power based high speed Tree based multiplier (TBM) architecture and the performance analysis of tree based multiplier (TBM) with the conventional multiplier design. The speed and efficient level of the proposed architecture is achieved by improving the conventional tree based multiplier (TBM) stage with the proposed AND-OR invert (AOI). There are two basic methods are used to propose the efficient architecture such as AND-OR invert (AOI) and OR-AND-invert (OAI). Proposed architecture is designed with the advanced adder technology with the low area and power. Modelsim XE tool is used to evaluate the simulations and Xilinx ISE is used to estimate of the synthesis of the proposed architecture.

Carry skip adder, AND-OR invert, OR-AND invert. Nanometer.

"DESIGN OF TREE BASED MULTIPLIER (TBM) FOR HIGH SPEED APPLICATIONS ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.6, Issue 4, page no.240-243, April-2019, Available :http://www.jetir.org/papers/JETIRAZ06051.pdf

"DESIGN OF TREE BASED MULTIPLIER (TBM) FOR HIGH SPEED APPLICATIONS ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.6, Issue 4, page no. pp240-243, April-2019, Available at : http://www.jetir.org/papers/JETIRAZ06051.pdf